chiller carrier
Photodetector
chiller carrier |
.1 Introduction
The NOvaA photodetector is an avalanche photodiode (APD) operated at a gain of 100, cooled to -15˚C by a thermoelectric cooler (TEC), and readout via a Front-End Board (FEB). The FEB has a low noise, <200e- custom ASIC amplifier matched to the APD. Over 12,000 APD / TEC / FEB assemblies are required for the NOvA Far Detector.
.2 Technical Design Criteria
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The readout of the NOvA Far Detector has two distinct tasks: (1) read out events caused by neutrinos from the NuMI beamline at Fermilab and (2) operate between spills to collect cosmic ray events for calibration and monitoring. The readout will operate in a triggerless mode to accomplish both tasks seamlessly.
The NOvA Near Detector uses similar electronics but must satisfy different constraints. The mean signal from the far end is approximately 4 times greater for the shorter modules, and there will be multiple neutrino induced events in the detector during the NuMI spill. A modified version of the basic Far Detector design that samples each channel more frequently is required.
A time-stamp generated from the kicker fire, signal $74, from the NuMI beam line will be used to determine which events occur during the 11.1vs single turn extraction of the Main Injector protons onto the NuMI target. The actual length of time the protons will hit the target will be 6/7 of this, or 9.5s.
.3 Avalanche Photodiodes (APDs)
The photodetector for NOvA is an avalanche photodiode (APD), shown in Figure 14.1. The APDs are packaged in arrays of 32 pixels and mounted on a carrier board substrate using flip-chip mounting. This device has been custom made for NOvA to optimize the fit of two fiber ends on a single pixel. The 32 pixels map directly onto the 32 cells of a single PVC extrusion module. Table 14.1 summarizes the key parameters for the NOvA APDs.
Fig. 14.1: Prototype NOvA APD mounted on carrier board.
4 Carrier Boards
The APD arrays will be mounted on a separate APD carrier board that is environmentally isolated from the other electronic components to minimize the thermal load. The mounting will be done with flip-chip technology, so the active area of the APD will face rectangular slots cut out of the PC board where the fibers will terminate. The back of the APD is protected and stiffened by a ceramic backer as shown in Figure 14.7. The flip-chip method provides an accurate means of aligning the APD to the PC board to which the fiber connector will also be aligned. The fiber connector must accurately align the fibers both longitudinally and transversely to the APD pixels.
One of the operating requirements for the APDs is that they be kept dry. Dew-point concerns associated with the low operating temperature of the TE coolers have led us to a design where the APD and TE cooler are enclosed in a sealed environment, kept dry with silica gel as in computer disk drives.
Manufacturer
|
Hamamatsu
|
Pixel Active Area
|
1.95 mm × 1.0 mm
|
Pixel Pitch
|
2.65 mm
|
Array Size
|
32 pixels
|
Die Size
|
15.34mm × 13.64mm
|
Quantum
Efficiency (>525 nm)
|
85%
|
Pixel Capacitance
|
10 pF
|
Bulk Dark Current
(IB) at 25 C
|
<50pA
|
Bulk Dark Current
(IB) at -15 C
|
<2.5 pA
|
Peak Sensitivity
|
600 nm
|
Operating Voltage
|
375 ± 50 volts
|
Gain at Operating
Voltage
|
100
|
Operating
Temperature (with Thermo-Electric Cooler)
|
-15ºC
|
Expected
Signal-to-Noise Ratio (Muon at Far End of Cell)
|
10:1
|
APD channels per
plane
|
384
|
APD arrays per
plane
|
12
|
Total number of
planes
|
1003
|
Total Number of
APD arrays
|
12,036
|
APD pixels total
|
385,152
|
Table 14.1: Avalanche Photodiode parameters.
The general structure of an APD is shown in Figure 14.2. Light is absorbed in the collection region, electron-hole pairs are generated and, under the influence of the applied electric field, electrons propagate to the p-n junction. At the junction, the electric field is sufficiently high that avalanche multiplication of the electrons occurs. The multiplication of the current is determined by the electric field at the junction and by the mean-free-path of electrons between ionizing collisions, which depends on both the accelerating field and on the temperature. This temperature dependence occurs because the probability of electron-phonon scattering, which competes with the avalanche multiplication process, increases with temperature.
One of the operational characteristics of APDs, and, in fact, all silicon devices, is the thermal generation of electron-hole pairs which mimic the signal. Since the current from the positive carriers is amplified about fifty times less than the negative carrier current at the junction, only the current from electrons generated in the photo-conversion region (IB), or the bulk current, needs to be considered in the noise current estimation. As it is a thermally generated current, it can be reduced by lowering the operating temperature of the APD. We will operate the APDs in the NOvA detector at -15° C to keep the noise contribution from IB small in comparison to the front-end noise. This choice is based on measurements obtained with prototype readouts.
The amplification mechanism in the APD is itself subject to noise, characterized by the excess noise factor F, with such factors as device non-uniformities and the ratio of the positive to negative impact ionization coefficients contributing. This factor is well modeled and has been included in our signal to noise calculations.
APDs have two substantial advantages over other photodetectors: high quantum efficiency, and uniform spectral quantum efficiency. The high APD quantum efficiency enables the use of very long scintillator modules, thus significantly reducing the electronics channel count. In the wavelength region relevant to the output of the wavelength shifting (WLS) fibers, 500 to 550 nm, the APD quantum efficiency is 85%. See Figure 14.3.
Fig. 14.2: The basic structure of a blue/green sensitive APD. Light crosses the anti-reflection coating at the surface and is absorbed in the collection region. Photoelectrons drift in the electric field to the junction where they undergo avalanche multiplication.
Fig. 14.3: WLS fiber emission spectra measured at lengths of 0.5, 1, 2, 4, 8, 16 m, respectively illustrating the shift of the average detected wavelength as fiber length increases. Also shown are the quantum efficiencies of APDs and PMTs (bialkali photocathode).
Hamamatsu is the only known vendor for APD pixel arrays. Hamamatsu markets a 32-pixel packaged APD with a pixel size of 1.6 mm by 1.6 mm. To maximize light output, NOvA utilizes a looped or U-shaped WLS fiber. Both ends of the looped fiber terminate on the same APD pixel. To comfortably accommodate both fiber ends, Hamamatsu has modified the pixel size and shape to match our requirements. Prototypes of the modified APDs have been provided bump bonded to an APD carrier circuit board. These devices are being tested as part of our qualification
process for the final design. Results of qualification tests for gain and bulk dark current (dark current divided by gain) are shown in Figures 14.4 and 14.5. These channels performed well.
For initial evaluation we also purchased a number of Hamamatsu S8550, packaged APD arrays. The dark currents were consistent with expectations, and the gains were uniform from pixel to pixel on the same chip and within individual pixels. The measured pixel separation for one of the sample arrays is shown in Figure 14.6. The fall-off on the pixel edges reflects the finite spot size used to illuminate the APD pixels.
For initial evaluation we also purchased a number of Hamamatsu S8550, packaged APD arrays. The dark currents were consistent with expectations, and the gains were uniform from pixel to pixel on the same chip and within individual pixels. The measured pixel separation for one of the sample arrays is shown in Figure 14.6. The fall-off on the pixel edges reflects the finite spot size used to illuminate the APD pixels.
Fig. 14.4: Gain vs. applied voltage at Room Temp for 32 channels of a Hamamatsu NOvA prototype APD array.
Fig. 14.5: Bulk Dark Current vs. gain for 32 channels of a prototype APD array measured at room temperature. Cooling to -15C will decrease the current by a factor of at least 20.
Fig. 14.6: Fine point scan across part of a Hamamatsu S8550 APD array. The fall-off on the pixel
edges reflects the finite spot size used to illuminate the APD pixels.
One of the attractive features of APDs is that once they have been calibrated, the gain can be easily determined from the applied bias voltage and the operating temperature. In the NOvadetector, we will maintain the operating bias to a precision of 0.2 Volts and control the temperature to 0.5° C and thus hold the gain stability to about 3%, consistent with the pixel-to-pixel variation. The absolute calibration of temperature and voltage are not critical for the experiment, only the gain. The NOvA APDs will typically operate between 350V - 450V at a standing current of approximately 1 nA per 32-channel APD array. The high voltage system is described in Section 14.10.
4 Carrier Boards
The APD arrays will be mounted on a separate APD carrier board that is environmentally isolated from the other electronic components to minimize the thermal load. The mounting will be done with flip-chip technology, so the active area of the APD will face rectangular slots cut out of the PC board where the fibers will terminate. The back of the APD is protected and stiffened by a ceramic backer as shown in Figure 14.7. The flip-chip method provides an accurate means of aligning the APD to the PC board to which the fiber connector will also be aligned. The fiber connector must accurately align the fibers both longitudinally and transversely to the APD pixels.
One of the operating requirements for the APDs is that they be kept dry. Dew-point concerns associated with the low operating temperature of the TE coolers have led us to a design where the APD and TE cooler are enclosed in a sealed environment, kept dry with silica gel as in computer disk drives.
Fig. 14.7: Front and back views of an APD array mounted to a carrier board.
.5 APD Module
The APD arrays mounted on the carrier will be integrated into a housing, and the device will be called the APD Module. The requirements on the mechanical housing for the APD arrays and associated systems required to operate the APD’s are enumerated. This includes the requirements on the (1) structural, (2) thermal, (3) environmental, (4) optical and (5) electrical couplings/interfaces that must be provided by the APD module system.
The APD module provides an optical interface between a single 32-cell scintillator detector module and a 32-channel Avalanche Photodiode array, which is used to convert the optical signals from the detector module to electronic signals. The APD module thus also provides an interface to the Front End Board (FEB).
In addition to the interfaces mentioned above, the APD module must provide the means to operate the APD array in a robust and problem-free manner. A stable bias voltage must be supplied. Control and readback of APD array temperature must be provided. Exposure to light and moisture must be avoided during operation of the APD module. Ease of assembly and disassembly must be considered.
Consequently, the APD module currently consists of the following components: (a) a 32-channel APD array, (b) a “carrier” printed circuit board on which the APD array is mounted, (c) a thermoelectric cooler (TEC), (d) a heat sink for removal of heat from the TEC, and (e) an enclosure. These components are shown in Figure 14.8..
The APD arrays mounted on the carrier will be integrated into a housing, and the device will be called the APD Module. The requirements on the mechanical housing for the APD arrays and associated systems required to operate the APD’s are enumerated. This includes the requirements on the (1) structural, (2) thermal, (3) environmental, (4) optical and (5) electrical couplings/interfaces that must be provided by the APD module system.
The APD module provides an optical interface between a single 32-cell scintillator detector module and a 32-channel Avalanche Photodiode array, which is used to convert the optical signals from the detector module to electronic signals. The APD module thus also provides an interface to the Front End Board (FEB).
In addition to the interfaces mentioned above, the APD module must provide the means to operate the APD array in a robust and problem-free manner. A stable bias voltage must be supplied. Control and readback of APD array temperature must be provided. Exposure to light and moisture must be avoided during operation of the APD module. Ease of assembly and disassembly must be considered.
Consequently, the APD module currently consists of the following components: (a) a 32-channel APD array, (b) a “carrier” printed circuit board on which the APD array is mounted, (c) a thermoelectric cooler (TEC), (d) a heat sink for removal of heat from the TEC, and (e) an enclosure. These components are shown in Figure 14.8..
.5.1 APD Module Testing
The APD housing will be tested after production for water tightness. The assembled module with the APD array will be tested at a separate time. An automated testing apparatus is being developed to perform this function efficiently, 12 modules at a time. The individual pixels of the APD arrays will be tested for dark current that is out of spec, high or low, and gain as a function of voltage. These measurements will be performed at room temperature for comparison to the manufacturer tests and at operating temperature of -15C. This will test the operation of the TEC devices as well as the APD. The test will determine the operating voltage required to operate each array at a gain of 100 at the operating temperature of -15C. The results of the first test will determine the required setting of the voltage adjustment potentiometer on each carrier board. The board will be set to the correct value, and retested to confirm the proper gain is achieved.
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The APD housing will be tested after production for water tightness. The assembled module with the APD array will be tested at a separate time. An automated testing apparatus is being developed to perform this function efficiently, 12 modules at a time. The individual pixels of the APD arrays will be tested for dark current that is out of spec, high or low, and gain as a function of voltage. These measurements will be performed at room temperature for comparison to the manufacturer tests and at operating temperature of -15C. This will test the operation of the TEC devices as well as the APD. The test will determine the operating voltage required to operate each array at a gain of 100 at the operating temperature of -15C. The results of the first test will determine the required setting of the voltage adjustment potentiometer on each carrier board. The board will be set to the correct value, and retested to confirm the proper gain is achieved.
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